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Lunar Lake

Unknown

Lunar Lake

2024 desktop
Microarchitecture
NPU 4

Historical hardware entry sourced from Wikipedia: Lunar Lake.

Key specifications

Cores
8 / threads

general

10 nm Tremont
130 nm Tualatin
14 nm Airmont
180 nm Coppermine
22 nm Silvermont
226V 16 GB
236V 16 GB
250 nm Deschutes
256V 16 GB
266V 16 GB
32 nm Saltwell
350 nm Pentium Pro(166–200 MHz)
45 nm Bonnell
500 nm Pentium Pro(150 MHz)
65 nm Yonah
90 nm Dothan
Architecture NPU 4
Brand name(s) Core Ultra
Codename(s) LNL
Compute tile TSMC N3B
Core count Up to 8 cores: 4 P-cores4 E-cores
Core Ultra 9 4 (4)
Designed by Intel
E-core architecture Skymont
E-core L1 cache 96 KB (per core): 64 KB instructions32 KB data
E-core L2 cache 4 MB (per cluster)
Execution units Up to 64 EUs
Extensions SSE4.1, SSE4.2, AVX2
Fabrication process TSMC N3BTSMC N6
Foveros interposer base tile Intel 22FFL
Generation Series 2
Graphics architecture Xe2-LPG (Battlemage)
Instructions x86, IA-32, x86-64
Instructions set x86-64
Intel 18A Arctic Wolf
Intel 3 Arrow Lake-U
Intel 4 Crestmont
Intel 7(10 nm ESF) Gracemont
Launched September 2024
Manufactured by TSMC
Maximum capacity Up to 32 GB
Memory channels 2 channels
N3B (TSMC) Skymont
NetBurst Katmai
NetBurst(HT) Pentium M
P-core architecture Lion Cove
P-core L0 cache 48 KB data (per core)
P-core L1 cache 256 KB (per core): 64 KB instructions192 KB data
P-core L2 cache 2.5 MB (per core)
P-core L3 cache 3 MB (per core)
PCIe lanes 8 lanes: 4 PCIe 5.0 lanes4 PCIe 4.0 lanes
PCIe support PCIe 5.0
Platform controller tile TSMC N6
Platform(s) Mobile
Predecessor Meteor Lake
Socket(s) BGA 2833
Successor Panther Lake
TOPS Up to 48
Type LPDDR5X-8533
Variant Arrow Lake
Xe cores Up to 8 Xe Cores

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Sources