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Arrow Lake (microprocessor)

Unknown

Arrow Lake (microprocessor)

2024 desktop
Microarchitecture
NPU 3720

Historical hardware entry sourced from Wikipedia: Arrow Lake (microprocessor).

Key specifications

general

10 nm Tremont
130 nm Tualatin
14 nm Airmont
180 nm Coppermine
22 nm Silvermont
225F —N/a
250 nm Deschutes
250KF Plus —N/a
265F —N/a
32 nm Saltwell
350 nm Pentium Pro(166–200 MHz)
45 nm Bonnell
500 nm Pentium Pro(150 MHz)
65 nm Yonah
90 nm Dothan
Architecture NPU 3720
Brand name(s) Core Ultra
Codename(s) ARL
Core Ultra 3 205[31][32]
Core Ultra 5 6 (6)
Core Ultra 7 12 (12)
Core Ultra 9 8 (8)
Designed by Intel
DMI version DMI 4.0 x8
E-core architecture Skymont
E-core L1 cache 96 KB (per core): 64 KB instructions32 KB data
E-core L2 cache 4 MB (per cluster)
E-core L3 cache 3 MB (per cluster)
Execution units Up to 64 EUs
Extensions AES-NI, CLMUL, SM3, SM4, SHA, TXT, RDRAND, MMX, SSE, SSE2, SSE3, SSSE3, SSE4, SSE4.1, SSE4.2, AVX, AVX2, FMA3, AVX-VNNI, AVX-IFMA, VT-x, VT-d
Fabrication process TSMC N3BTSMC N5PTSMC N6
Generation Series 2
Graphics architecture Xe-LPG Xe-LPG+
Instructions x86, IA-32, x86-64
Instructions set x86-64
Intel 18A Arctic Wolf
Intel 3 Arrow Lake-U
Intel 4 Crestmont
Intel 7(10 nm ESF) Gracemont
Launched October 24, 2024
Manufactured by Intel, TSMC
Maximum capacity 256 GB
Memory channels 2 channels
N3B (TSMC) Skymont
NetBurst Katmai
NetBurst(HT) Pentium M
P-core architecture Lion Cove
P-core L0 cache 48 KB data (per core)
P-core L1 cache 256 KB (per core): 64 KB instructions192 KB data
P-core L2 cache 3 MB (per core)
P-core L3 cache 3 MB (per core)
PCIe lanes 20 PCIe 5.0 lanes 4 PCIe 4.0 lanes
PCIe support PCIe 5.0
Peak core clock Up to 5.7 GHz
Peak graphics clock 2.0 GHz
Platform(s) Desktop, Mobile
Predecessor Meteor Lake (mobile)Raptor Lake (desktop and mobile)
Socket(s) LGA 1851BGA 2114
Successor Panther Lake (mobile)Nova Lake (desktop and mobile)
Type DDR5-6400
Variant Lunar Lake
Xe cores Up to 8 Xe Cores

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Sources